Fault Location Algorithm for HVDC Transmission Based on Synchronized Fault Time

Kristianto Adi Widiatmoko; F. Danang Wijaya; Tumiran Tumiran

doi:10.22146/ijitee.44926

Fault Location Algorithm for HVDC Transmission Based on Synchronized Fault Time

https://doi.org/10.22146/ijitee.44926

Kristianto Adi Widiatmoko^(1*), F. Danang Wijaya⁽²⁾, Tumiran Tumiran⁽³⁾

(1) Universitas Gadjah Mada
(2) Universitas Gadjah Mada
(3) Universitas Gadjah Mada
(*) Corresponding Author

Abstract

To determine the fault location of the dc line fault in an HVDC transmission system, a new algorithm based on the traveling wave method and learning based method is proposed in this paper. The relationship between the traveling wave time of arrival differences with fault location is presented. The differences in traveling wave time of arrival measured at both ends of transmission line combined with associated fault locations form a fault pattern which is used to perform a simple calculation in order to determine the disturbance location. The fault current for different fault locations is simulated using the electromagnetic transient simulation software EMTDC/PSCAD. Performance of the proposed fault location algorithm is investigated using various fault location and resistance. The impact of data sampling rate also being investigated here. The simulation result shows that the proposed algorithm can reduce the sampling frequency and the number of train feature with the same accuracy.

Keywords

HVDC; Transmission; Fault Location; Traveling Wave; Double-end

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References

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DOI: https://doi.org/10.22146/ijitee.44926